Performance Analysis of Trench Power MOSFETs in High-Frequency Synchronous Buck Converter Applications

This paper investigates the performance perspectives and theoretical limitations of trench powerMOSFETs in synchronous rectifier buck converters operating in the MHz frequency range. Several trench MOSFET technologies are studied using a mixed-mode device/circuit modeling approach. Individual power loss contributions from the control and synchronous MOSFETs, and their dependence on switching frequency between 500 kHz and 5MHz are discussed in detail.

Introduction

It is observed that the conduction loss contribution decreases from 40% to 4% while the switching loss contribution increases from 60% to 96% as the switching frequency increases from 500 KHz to 5 MHz. Beyond 1MHz frequency there is no obvious benefit to increase the die size of either SyncFET or CtrlFET. The RDS(ON) × QG figure of merit (FOM) still correlates well to the overall converter efficiency in the MHz frequency range. The efficiency of the hard switching buck topology is limited to 80% at 2MHz and 65% at 5MHz even with the most advanced trench MOSFET technologies.Trench powerMOSFETsare widely used as both control and synchronous rectifier switches (CtrlFET and SyncFET) in buck converters for computer, telecommunication, and consumer applications. Power MOSFETs usually account for most of the power losses, and often determine the overall efficiency of today’s DC/DC converters. Over the past decade, the power semiconductor industry has significantly improved MOSFET performance, especially in terms of the figure of merit (FOM) of RDS(ON) × QG.

The analysis, modeling, and optimization of powerMOSFET performance in synchronous buck converters have also become the focus of a significant amount of research work in the past few years. The objective is to identify the optimum design of the CtrlFETs and SyncFETs that offer the highest converter efficiency. The previous work addressed this goal with varied levels of success, but several issues still remain open especially in light of ever-evolving DC/DC converter design requirements.


The RDS(ON) × QG FOM is generally considered as the single most important indicator of MOSFET performance in DC/DC converters in the medium switching frequency range of 100 kHz to 1 MHz. As the switching frequency of buck converters increases to the MHz range to facilitate better converter transient response and smaller passive components, it is, however, not clear how closely the RDS(ON) × QG FOM correlates to the overall converter efficiency, or whether or not a different FOM needs to be defined. Furthermore, the analysis on individual MOSFET power loss contributions, namely, conduction loss of the CtrlFET, conduction loss of the SyncFET, switching loss of the CtrlFET, diode loss of the SyncFET, and gate-drive losses of both the CtrlFET and SyncFET, was previously limited to the use of simple analytical equations based on approximations and assumptions. These simple device models have only very limited ccuracy. More importantly, they are not capable of revealing or predicting the influence of variations in device structures or circuit operating conditions on each of the individual power loss terms. This is the essential knowledge required for developing future generation power MOSFETs for high-efficiency and high-density buck converters.

Lastly, the scope of the previous work on power MOSFET performance analysis was limited to the study of either one particular power MOSFET technology or just a limited number of commercial parts .While offering useful information on how to select commercially available power MOSFETs for today’s practical converter design, the previous work does not sufficiently address the perspectives and theoretical limitations of power MOSFET technology for future generation DC/DC converters operating with ever-increasing switching frequency, slew rate, and output current.

The purpose of this paper is to comprehensively investigate the performance perspectives and theoretical limitations of trench power MOSFET technology in synchronous rectifier buck converters over a wide range of operating conditions. The MOSFET device structures under investigation include but are not limited to those manufacturable with today’s semiconductor fabrication technology. The investigation was carried out with a mixed-mode device/circuit simulation approach. Device measurement data was also used to validate the physical device models. Various power loss contributions from the CtrlFETs and SyncFETs at different operating conditions were studied in detail. Several important observations weremade which may shed some light on the development of future generation power MOSFETs, as well as the optimal utilization of today’s power MOSFETs in buck converter applications.

CONCLUSIONS

In this paper, we have comprehensively investigated the performance perspectives and heoretical limitations of trench power MOSFETs in synchronous rectifier buck converters over a wide range of operating conditions. Several trench MOSFET technologies are investigated using a mixed-mode device/circuit modeling approach. Individual power loss contributions from the CtrlFETs and SyncFETs and their dependence on switching frequency between 500 kHz and 5MHz are discussed in detail.

It is observed that going from 0.5MHz to 5MHz, the conduction loss contribution decreases from 40% to 4% while the switching loss contribution increases from 60% to 96%. Under hard switching operation condition, the buck converter efficiency is limited to 80% at 2MHz and 65% at 5MHz even with the most advanced trench MOSFET technology. For the base technology we studied, beyond 1MHz frequency, there is no obvious benefit to increase the die size of either SyncFET or CtrlFET. For 5 MHz, given a constant die size of SyncFETs, the die size increase of CtrlFETs actually introduces obvious efficiency degradation. For different trench technologies, the technology,which has the lowest QG, provides smallest gate-driver losses and the smallest CtrlFET turning-off losses.

On the other hand, smaller QG gives faster switching transition, which may introduce larger reverse recovery loss due to large di/dt. Basically, there is a tradeoff between faster switching transition and smaller reverse recovery loss. The technology,which has lowest Qrr, theoretically provides the best reverse recovery loss under the same CtrlFET current slew rate. In order to give good indication on trench MOSFET design for MHz frequency operating range, we obtain the RDS(ON) × QG FOM. The simulation results show that this FOM still correlates well to the overall converter efficiency.

by : Yali Xiong, Xu Cheng, XiangchengWang, Pavan Kumar, Lina Guo, and Z. John Shen

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